1. Field of the Invention.
The invention relates to memory systems for data processing apparatus, and more particularly to redundant memory systems in which a predetermined sequence of information items stored in a memory portion can be accessed simultaneously.
2. Description of the Prior Art.
Data processing systems incorporating redundant memories are known in the prior art. Generally, redundant memories are intended to improve system reliability through the incorporation of error detection circuitry. Once an error has been detected by such circuitry, the redundant memories are used to determine the correct value of the information item stored. Another type of redundant memory is the buffer or cache store. The buffer or cache store contains information items which require much more rapid access than information items which are stored in the relatively slower main memory. In many implementations of a buffer or a cache store, the same information item is stored in both the buffer store and the main memory. In such prior art implementation of redundant memory systems, the buffer store merely repeats the information items stored in a portion of the main memory, and the processor accesses the buffer store in the same manner it would access the main memory. Although such implementations have the advantage of providing quicker access to a particular portion of the main memory, the organization of the buffer store in terms of its data structure is no different from that of the main memory.
Data processing systems incorporating stacks also are known in the prior art to include buffers, thereby providing a form of redundancy. In U.S. Pat. No. 3,905,023 there is described a data processing system adapted for processing program code strings based upon Polish notation. The constants and variables of the program are assigned locations within the stack of a program when it is compiled. In the preferred embodiment the stack implementation includes a stack buffer which permits a portion of an active stack to be contained in IC memory locations. The stack buffer in such a system may contain information items which have not yet been written into the main memory, as well as copies of information items which are resident in main memory. The stack buffer permits a portion of the stack to be held locally within the central processing module, thereby providing quick access for stack manipulation by the central processor.
Although various implementations of memory redundancy are known in the prior art, such implementations do not change the data structure or the organization of the information items stored. Prior to the present invention there has not been a memory redundancy organization which utilizes the random access organization of memories in order to read and write data from or to the redundant memory in a manner different from that of the original memory, or in a manner which expresses a particularly useful data structure or access protocol.